Fully integrated DC-DC converter
Date of Issue2018-09-12
School of Electrical and Electronic Engineering
This dissertation pertains to the design of on-chip inductors for high-frequency fullyintegrated DC-DC converter applications. The converter and inductors are designed using a CMOS 65 nm 6-metal layer technology. In order to increase the inductance on chip, more than one metal layer can be used, and the inductors are oriented in the vertical plane instead of the horizontal plane. These inductors are known as vertical inductors. The high aspect ratio and the high inductance per unit of area are the main advantages of vertical inductors. This dissertation describes the work done on modeling and verifications of a previously proposed vertical inductor. The said inductor has been integrated in a DC-DC converter IC. In this dissertation, the 3D structure of the inductor is designed to provide a clear visualization of the inductor compared to the 2D representation of the inductor layout. Printed Circuit Boards (PCBs) are subsequently designed and fabricated to measure the converter and the inductor. The quality factor (Q), impedance, series resistance, and series inductance of the inductor are measured and plotted. Measurement results show that the inductor achieves 133nH at 100 MHz with Q of 3, the highest inductance of 240 nH at ~150 MHz, and the highest Q of 5.6 at 250 MHz. This vertical inductor is thereafter compared with the optimal spiral inductor --- that can be achieved in theory using the CMOS technology --- whose inductance is 21 nH at 100 MHz with Q of 1.1. Spiral inductors are usually used as the on-chip inductors in fully-integrated DC-DC converters. The comparison shows that the inductance and the Q of the vertical inductor are much larger than those of the optimal spiral inductor. Hence, it can be concluded that the vertical inductor can have potential use in fully-integrated DC-DC converter and various other IC applications.
DRNTU::Engineering::Electrical and electronic engineering