View Item 
      •   Home
      • 1. Schools
      • College of Engineering
      • School of Computer Science and Engineering (SCSE)
      • SCSE Student Reports (FYP/IA/PA/PI)
      • View Item
      •   Home
      • 1. Schools
      • College of Engineering
      • School of Computer Science and Engineering (SCSE)
      • SCSE Student Reports (FYP/IA/PA/PI)
      • View Item
      JavaScript is disabled for your browser. Some features of this site may not work without it.
      Subject Lookup

      Browse

      All of DR-NTUCommunities & CollectionsTitlesAuthorsBy DateSubjectsThis CollectionTitlesAuthorsBy DateSubjects

      My Account

      Login

      Statistics

      Most Popular ItemsStatistics by Country/RegionMost Popular Authors

      About DR-NTU

      Developing secure, ultra-low power RISC processor

      Thumbnail
      Lim_Jun_Hao_U1421489D.pdf (2.563Mb)
      Author
      Lim, Jun Hao
      Date of Issue
      2017
      School
      School of Computer Science and Engineering
      Abstract
      General purpose Reduced Instruction Set Computing (RISC) processors are widely used while software applications are interacting with the Operating System (OS) to handle jobs, the OS communicate with the processor to complete the jobs with the help of accelerators. The goal of this project is to improve the area and speed of the processor while keeping the power usage to the minimum without compromising the security portion. The design of the processor and programming language will be based on an available open source RISC processor called RISC V, followed by an open source Hardware Description Language (HDL) named Chisel. By using HDL, the design of the processor will be explored at different levels to meet the goals as mentioned previously. For example, power consumption techniques like clock gating or and operand isolation will be introduced to minimize the power consumption and error correcting codes will be examined to tighten security. The final design will be synthesized into Zed Board Zynq 7000; a System on Chip development board for accurate benchmarking.
      Subject
      DRNTU::Engineering::Computer science and engineering
      Type
      Final Year Project (FYP)
      Rights
      Nanyang Technological University
      Collections
      • SCSE Student Reports (FYP/IA/PA/PI)

      Show full item record


      NTU Library, Nanyang Avenue, Singapore 639798 © 2011 Nanyang Technological University. All rights reserved.
      DSpace software copyright © 2002-2015  DuraSpace
      Contact Us | Send Feedback
      Share |    
      Theme by 
      Atmire NV
       

       


      NTU Library, Nanyang Avenue, Singapore 639798 © 2011 Nanyang Technological University. All rights reserved.
      DSpace software copyright © 2002-2015  DuraSpace
      Contact Us | Send Feedback
      Share |    
      Theme by 
      Atmire NV
       

       

      DCSIMG