High-speed DC-DC converter IC layout design
Goh, Tien Ying
Date of Issue2016-05-23
School of Electrical and Electronic Engineering
Centre for Integrated Circuits and Systems
This project elaborates on the studies of the design techniques, both traditional CMOS technology as well as other semiconductor technologies. These technologies are compared and analyse on their differences as a possible means to improve the high speed DC-DC converter’s efficiency despite of the restriction implemented in order to meet stringent requirement impose by the portable environment. The studies of design techniques on the traditional CMOS technology as well as other semiconductor technologies will be implemented in the gate driver stage to boost and provide sufficient current into the power transistors of DC-DC converter. These layouts are designed using Cadence Virtuoso platform. In addition, the report serves as a basis and foundation for upcoming students to apprehend the CMOS design techniques, restriction of design rules based on fabrication limitation, various layout matching methods and an understanding of using Cadence Virtuoso to design layout.
Final Year Project (FYP)
Nanyang Technological University