Design analysis of data links in 2.5 dics
Visamangalam Thattai Lakshminarayanan
Date of Issue2014
School of Electrical and Electronic Engineering
As the trend of device integration moves from VLSI to ULSI, number of problems have arisen for 3 dimensional integration of ICs with TSV technology. The increasing complexity and number of components on the substrate is expected to rise faster before Nano-technology takes over. 2.5DICs are a viable market alternative till the 3DIC processes and methods mature. 3DICs require multiple ICs to be placed on top of each other and interconnected by TSVs, which cause power delivery and thermal delivery problems. Individual known good dies connected in 3D fashion gives poor yields and get discarded if the integrated IC fails. 2.5DICs allow interconnection of multiple chips on the same Si substrate placed side to side with interconnections made using Si interposer with multiple metal layers. In this project, non conventional transmission line structures are proposed to improve the layout density of wide 10 high speed data links. The configurations are modelled and characterized using full wave 3D Electromagnetic field simulator. Results are validated based upon eye diagrams and loss parameters. A Current mode driver circuit is designed and simulated using STM 65nm technology node.
DRNTU::Engineering::Electrical and electronic engineering