Design of a low-power asynchronous multiplier.
Lim, Khoon Aun.
Date of Issue2003
School of Electrical and Electronic Engineering
This thesis pertains to design and analysis of a 16-bit low-voltage (1.1 V) low-power asynchronous parallel multiplier targeted for a low-power asynchronous digital signal processor.
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Nanyang Technological University