dc.contributor.authorJia, Guojunen_US
dc.date.accessioned2008-09-17T09:51:22Z
dc.date.available2008-09-17T09:51:22Z
dc.date.copyright2004en_US
dc.date.issued2004
dc.identifier.urihttp://hdl.handle.net/10356/4432
dc.description.abstractThe texture and stress properties of barrier layers on three types of low-k materials for copper (Cu) interconnects and electrical performance of the structure had been investigated.en_US
dc.rightsNanyang Technological Universityen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Microelectronics
dc.titleTexture and stress study of barrier layers on various low-K materials in copper technologyen_US
dc.typeThesisen_US
dc.contributor.supervisorZhang, Dao Huaen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.degreeMSC(MICROELECTRONICS)en_US


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record