Electrical characterization of IC packages.
Guruprasad B. G.
Date of Issue2003
School of Electrical and Electronic Engineering
In this project, a PBGA package 3D lumped element model is developed and its parasitics are extracted using a FEM based solver. The package data is validated with a standard measurement procedure developed by JEDEC. This simulation methodology can be extended to other critical signals and packages, and the parasitics can be extracted.
DRNTU::Engineering::Electrical and electronic engineering::Electronic packaging
Nanyang Technological University