Median filtering for image denoising with FPGA implementation.
Date of Issue2003
School of Electrical and Electronic Engineering
In this thesis, FPGA is chosen as the implementation platform based on an XSV-800 Virtex prototyping board from XESS Corporation. The focus of this thesis consists of three main parts: image acquisition, median filtering and image display, as well as two auxiliary parts.
DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing
Nanyang Technological University