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      Differential logic circuits for self-timed asynchronous systems

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      EEE-THESES_272.pdf (7.477Mb)
      Author
      Devta Noor Angkasa
      Date of Issue
      2003
      School
      School of Electrical and Electronic Engineering
      Abstract
      The objective of the project was to explore the various differential logic families in the literature and to design a new differential logic for high-speed low-power digital application that can be used in self-timed design methodology. This project focused on one important component in self-timed design methodology, i.e. the self-timed logic block component.
      Subject
      DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
      Type
      Thesis
      Rights
      Nanyang Technological University
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      • EEE Theses

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