Modeling of PCI with SystemVerilog.
Date of Issue2005
School of Electrical and Electronic Engineering
Deep submicron semiconductor technology has enabled system-level IC design complexity to exceed millions of gates. This presents a major design and verification challenge that intensifies the demand for system-level design languages. A major impact in solving this problem has been the development and standardization of an Hardware Description and Verification Language like SystemVerilog which caters all the needs for design as well as verification.
DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Nanyang Technological University