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      Study of digital breakdown in pMOSFETs with ultrathin gate dielectric and its significance to reliability assessment

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      EEE_THESES_NEW_65.pdf (9.598Mb)
      Author
      Ashwin Srinivas.
      Date of Issue
      2007
      School
      School of Electrical and Electronic Engineering
      Abstract
      The purpose of this project is to study the gate oxide breakdown in ultra-thin pMOSFETs using current-limited multiple cycle constant voltage stress tests. Samples of various dimensions are to be subjected to low voltage stresses in inversion mode and the gradual degradation of the device characteristics recorded. The evolution of the gate current, under the phenomenon of progressive breakdown, provides an insight into the evolution of the conductor-like percolation path within the oxide layer.
      Subject
      DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
      Type
      Thesis
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