IDDQ testing for deep sub-micron SOC
Date of Issue2005
School of Electrical and Electronic Engineering
The focus of this project is to study the application of new IDDQ testing schemes to deep-submicron SoC (System on Chip), for example, a 32-bit DSP microcontroller. Power partitioning has been applied to reduce the circuit scale under test from design point of view.
DRNTU::Engineering::Electrical and electronic engineering::Electronic systems
Nanyang Technological University