Latchup analysis of deep submicrometer CMOS devices.
Chen, Hong Lei.
Date of Issue2004
School of Electrical and Electronic Engineering
The effects of the following factors and their combinations on latchup behaviour of a Shallow Trench Isolation (STI) CMOS latchup test structure are studied: Varying both the STI dimensions and geometry parameters of the test structure. Varying the biasing conditions of the test structure. Changing the temperature conditions of the test structure.
DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Nanyang Technological University