dc.contributor.authorTroung, Thai Quang.en_US
dc.date.accessioned2008-09-17T09:33:38Z
dc.date.available2008-09-17T09:33:38Z
dc.date.copyright2001en_US
dc.date.issued2001
dc.identifier.urihttp://hdl.handle.net/10356/3613
dc.description.abstractThis project involves the design of 4x4 multipliers with VHDL language. The software MasPlus II, from Altera, was used throughout the design and simulation of this project.en_US
dc.rightsNanyang Technological Universityen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
dc.titleDesign of 4x4 multipliers with VHDL languageen_US
dc.typeThesisen_US
dc.contributor.supervisorLiu, Po-Chingen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.degreeMaster of Science (Consumer Electronics)en_US


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record