Low power CMOS circuit design using adiabatic logic.
Parthasarathy Srinivasa Raghavan.
Date of Issue2002
School of Electrical and Electronic Engineering
This dissertation elaborated on the most popular low power CMOS circuit and power reduction techniques. A special punch is given on the Adiabatic Quasi-Static CMOS logic of power reduction, followed by the proposal of “Reduced swing Aqs-CMOS/ASL logic.
DRNTU::Engineering::Electrical and electronic engineering
Nanyang Technological University