RSS 1.0EEE Theses
Recent Submissions
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Switch cell optimization for power gated design
(2018-10-23)One of the key features for the success of hand-held devices is their low power consumption. For complex architecture and high frequency computation, reducing chip power dissipation has become ever more important. Various ... -
Setup and implementation of hierarchical scan insertion using the core wrapping technique
(2018-10-23)The rapid shrinking of the technology node from deep submicron levels to 90nm and below has allowed the complexity of the designs to increase without significantly increasing the chip size. Large designs are now posing ... -
Characterization of RF receiver front-end
(2018-10-23)Satellite navigation systems (satnav) provides the specific location of an object in the spatial dimension. Although the satellite navigation systems were originally built for military application, it is now widely used ... -
Multi-valued logic synthesis for Resistive Random Access Memory (RERAM) based in-memory computing
(2018-10-22)In-memory computing is a growing field of research which involves storing and processing of data at the memory. Resistive random access memory devices (RERAM) are among the class of memories which enable in-memory ... -
UVM based constrained random automated register verification of interface IP subsystem
(2018-10-22)Modern Integrated Circuit (IC) designing is a huge and error-prone task that could potentially cost a fortune to the company even because of a minute glitch. In order to minimize the risks associated with the design of an ... -
Low power supply module design of under voltage lock out circuit
(2018-10-22)The new era has witnessed the development of the process and technique in IC field. Power management ICs are growing strongly. With the development also comes the strict demanding of power consumption, hence a UVLO (Under ... -
Design and testing on novel non-imprinting SRAM
(2018-10-22)The security of data information is the most concemmg parameter for memory devices design contemporarily. Many protective actions or mechanisms are implemented to enhance the robustness of the memory against the ... -
Design of a 5-ary 1-cube torus network-on-chip
(2018-10-22)A one-dimensional torus network-on-chip with five switching nodes, which can also be named as 5-ary 1-cube torus, has been designed. The routers in the network can tackle input flow control digits (flits) from three different ... -
Module level verification for low Power SoC based on universal verification methodology
(2018-10-22)The thesis pertains to study the specification of the low power mix-signal SoC and develop a well-rounded verification environment and testcases using the Universal Verification methodology (UVM) for one module, Pulse ... -
Analysis of memory BIST architecture flow
(2018-10-22)The burgeoning amount and complexity of memories in modern SoC have brought forth new challenges in memory testing. Memory Built-in self-test (BIST) is the most widely used solution for memory testing. MBIST is defined as ... -
Analysis and architecting of hierarchical DFT flow
(2018-10-22)Design for Test (DFT) is a critical activity in the modern System on Chip designs as the complexity of the chip is increasing. Generating test patterns for the current and upcoming devices having huge designs is again ... -
Automating the creation of UVM register model and C header files from register specification
(2018-10-22)Complex hardware IP or SoC can have more than or near to 10,000 of configuration and status registers. An accurate memory map description is needed by design, verification and firmware teams. Thus the huge and never stopping ... -
Optimizing control architecture for next generation cellular transceivers by introducing performance accelerator
(2018-10-22)There is a growing demand for wireless communication. The present cellular modem technology, i.e., 4G Long Term Evolution is not being able to meet this demand. 4G LTE is unable to provide quick updates on the antenna of ... -
FPGA based prototyping of UART block in GNSS transceiver
(2018-10-22)System-on-Chip devices are getting more complex with multiple IP blocks. As such, IP validation plays a major role in mitigating IP bugs which lead to the chip failure. Tough it is not possible to completely eliminate this ... -
Detection and prevention of critical races in finite state machines driving glitch-sensitive receivers
(2018-10-22)A combinational circuit containing a functional hazard may generate a glitch due to a race of signal transitions. A race occurring in the output logic of a Finite State Machine (FSM) may be critical when it is used to ... -
Avoidance of bus bunching
(2018-10-02)Bus bunching is the phenomenon of clumping / clustering of buses. Generally buses are scheduled and expected to operate at certain time intervals on a specific route. It is of a natural occurrence that the due to on-road ... -
2D stickman mapping of human physical movements using IMU (sports technology)
(2018-09-24)In the modern society, sports are playing more and more important roles. The body is the most important carrier of every movement. Every individual has a unique state while executing a physical action. Different movement ... -
Synchronous generator fault diagnosis based on neural network
(2018-09-24)The fault diagnosis of synchronous generators has been a popular research topic due to its wide usage in industry, agriculture, transportation and so on. Failure of generator not only damages the generator itself, but also ... -
Thermal sensor analysis for prediction of comfort levels of human body in air-conditioned environment
(2018-09-24)Substantial amount of energy is spent in air-conditioning systems in the buildings. However, they often result in over-cooling which may lead to huge waste of energy, as well as dissatisfaction of occupants. The desirable ... -
Deep learning for power system time series forecasting
(2018-09-24)Power system time series forecasting is an essential part of smart electric grid. It enhances the reliability and reliability and efficiency of the power system. However, the traditional forecasting methods are unable ...
