Design and implementation of digital filter in polyphase structure
Date of Issue2009
School of Electrical and Electronic Engineering
Centre for Integrated Circuits and Systems
As the fast development of digital circuits, the IC chips are required to be smaller, consumes low voltage, low power, and this is the trend in the current IC design industry. This gets the challenge for designers to design the circuits with small area, low power consumption, higher speed. To find solutions to reach these requirements, a lot of techniques have been developed through the past fifty years. And among these techniques, polyphase structure is one of the mostly used techniques in FIR digital filter design. This project is to investigate polyphase structure through the design and testing of FIR digital filters. The technique of symmetric polyphase structure is introduced in this project which is compared with the traditional structure in the testing of area, power and speed. Techniques of Multiple Constant Multiplication (MCM) and Common Subexpression Elimination (CSE) are also included in the design of FIR digital filter design. Through the comparison of the tradition structure and this new symmetric structure, the performance of polyphase structure is observed and analyzed. The comparisons of these two structures are made in the MATLAB and Modelsim simulation environment on their functionality, area, power consumption and speed in FPGA. Results of the comparison testing show that, the symmetric structure cuts the area while consumes more power and has a slower speed. Smaller area means less cost in semiconductor industry, so the results of the testing show that the symmetric can help to save a lot cost in IC chip production.
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Final Year Project (FYP)
Nanyang Technological University