Performance characterisation and design issues of low voltage BiCMOS digital circuits.
Cheong, Chee Seng.
Date of Issue1998
School of Electrical and Electronic Engineering
This report addresses the work done on the power and speed optimisation of 4 different BiCMOS gate structures using 3 sub-micron technologies; namely 1.5V/0.35um, 2.2V/0.5|im and 3.3V/0.8(im for several fan-in fan-out conditions. The BiCMOS structures studied in this project encompass the Bootstrapped BiCMOS (BS BiCMOS), Bootstrapped Full-Swing BiCMOS (BS-FS BiCMOS), Feedback BiCMOS (FB BiCMOS) and Transient Saturated Full-Swing BiCMOS (TS-FS BiCMOS). The BiCMOS performance was characterised by the performance of power and speed in 2 input NAND/AND and NOR/OR gates. The study also covers performance and characterisation using low quality and high quality BJT fabrication processes.
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits